The PCI/C80, much more than just a board...

Many high technology Digital Signal Processing companies have been
developing products based around the new Texas Instruments MVP (TMS320C80)
device within the Graphics and Image Processing Industries - this article
presents solutions to using the device in a wide variety of applications
and how a structured and modular software architecture will enable new
applications to be developed efficiently with minimum effort.

The MVP is a fully programmable multi-processor architecture device
designed especially for mathematically intensive applications including
graphics and image processing. The device combines Advanced Digital Signal
Processors, a RISC Processor and many features of Graphics Processors into
a single chip with outstanding performance.

Digital Signal Processing

Digital Signal Processing (DSP) devices have been around for a number of
years now. They are designed to execute the algorithms found in signal
processing very quickly and efficiently, and typically have many
optimizations for this. For example:

** A multiply unit which can operate in parallel with arithmetic functions
to give a multiply/accumulate operation running in a single processor
cycle. This is the foundation of many algorithms such as filters and
convolutions.

** Data fetches and address generation in parallel with the processing
operations, again all in a single processor cycle.

** High data bus bandwidth and often multiple or separate data buses. This
means that the processing unit never has to wait for the data it needs to
process.

** Fast and predictable real time performance.

Due to their speed and power, general purpose DSP devices are now being
used in a wide range of applications including signal and image
processing, data acquisition and analysis and control.

Why the Spectrum/LSI PCI/C80 ?

As the MVP architecture enables the design of fast, efficient graphics and
image processing systems to form the complete picture in these
marketplaces a broad spectrum of application and enabling software is
required. We have had such software in development even prior to the
TMS320C80 official announcement by Texas Instruments in February 1994
when, at the same time, Spectrum/LSI announced its MVPEVM evaluation board
for the 'C80 device which soon became the industry standard.

Since that initial launch engineering has designed two further
application-specific TMS320C80 boards with supporting software prior to
the development of the latest product - the PCI/C80. This MVP hardware and
software strategy is Spectrum/LSI's added value over and above the
innovative DSP design our customers have been building systems with for
well over a decade.

Much effort has been expended in the design and creation of an integrated
software environment where utility libraries can be simply added to create
a mix and match software toolbox configurable to meet the users
requirements. Such software enables the MVP to be utilized in applications
as far reaching as Virtual Reality, Medical Workstations, Games, Video
Conferencing, Industrial Inspection, Sonar and Radar Graphics Processing
and Pre-Press Algorithm Acceleration - to name but a few.

For example, a graphics application running within a multi-media
environment adds considerable value to the overall system functionality.
Adding video compression the system could be used in a medical environment
to perform remote doctor-patient diagnosis by overlaying real and
graphical representations, alternatively another example would be applying
the same criteria to perform remote fault diagnosis of industrial
inspection equipment.

To this end Spectrum/LSI have made available a scalable, modular Video
Multimedia System. This structure is based around the TMS320C8x device and
is therefore available to users of Spectrum/LSI's new PCI/C80 applications
board.

The software architecture is shown diagrammatically in figure one.
Basically, all systems are built from modular building blocks, which can
be removed or duplicated as necessary to suit a particular application. A
series of layers are used to isolate the man-machine interface (MMI) from
the specialist DSP hardware.

When describing the system simply, there are three layers to consider; a
media manager upper layer allows the sub-system to be configured with
calls from a host application. In a PC environment this task is concealed
from the user by the standard Windows API.

The middle layer is where the libraries of application software can be
loaded and run within the environment. Several applications can be loaded
and running concurrently assuming they do not compete for the same
resource.

The bottom layer is a multi-tasking environment which is used to isolate
the tasks from the hardware. It implements a message based environment in
which multiple user applications can run simultaneously up to the point
where all system resources are exhausted.
---------------------------------------------------------------------
MVP - The Next Leap Forward For Machine Vision

Much is being said about the new Texas Instruments MVP (TMS320C80) device
within the Graphics and Image Processing Industries - the aim of this
article is to clarify some of the device's features and the impact they
will have on an industry that has traditionally used fixed hardware
designs and other proprietary technology.

The MVP is a fully programmable multi-processor architecture device
designed especially for mathematically intensive applications including
the graphics and prepress markets. The device combines Advanced Digital
Signal Processors, a RISC Processor and many features of Graphics
Processors into a single chip with outstanding performance.

Digital Signal Processing

Digital Signal Processing (DSP) devices have been around for a number of
years now. They are designed to execute the algorithms found in signal
processing very quickly and efficiently, and typically have many
optimizations for this. For example:

** A multiply unit which can operate in parallel with arithmetic functions
to give a multiply/accumulate operation running in a single processor
cycle. This is the foundation of many algorithms such as filters and
convolutions.

** Data fetches and address generation in parallel with the processing
operations, again all in a single processor cycle.

** High data bus bandwidth and often multiple or separate data buses. This
means that the processing unit never has to wait for the data it needs to
process.

** Fast and predictable real time performance.

Due to their speed and power, general purpose DSP devices are now being
used in a huge range of applications including signal and image
processing, data acquisition and analysis and control.

What's special about the MVP?

The MVP is no ordinary DSP device. By incorporating four DSPs and a RISC
device onto one piece of silicon it offers previously unthinkable
performance from a single chip - two billion operations per second.

The 32 bit floating-point Master Processor (MP) is a general purpose RISC
processor designed to efficiently execute complex control code written in
a high level language such as C. It is also the overall system controller
of the MVP.

The four 32 bit fixed-point Advanced Digital Signal Processors (ADSPs) each
feature an extremely parallel instruction set with a single cycle
multiplier unit, a three input arithmetic logic unit (which allows masking
and arithmetic operations to be combined), two address generation and data
store/fetch units and program control and looping. For pixel processing,
both the multiplier and ALU are splittable, enabling multiple 8 bit pixels
to be processed in one operation. There are also specific features for
pixel processing such as bit expanders and masks built in to the
instruction set.

With the very high parallelism possible, a single ADSP instruction,
executed in a single processor cycle, can very easily carry out nine or
more RISC like operations.

In addition to this revolutionary performance the device has a very high
external bus bandwidth (400 Mbytes/s max) and features a very intelligent
DMA Transfer Controller (TC) enabling external bus transfers independently
of any processing.

Thus algorithms can be efficiently partitioned with, typically, the MP
managing the system, handling host communications and any high level
operations, and the ADSPs and TC handling the low level, high speed, pixel
processing.

Typical Industrial Inspection Algorithms

An analysis of feedback from industrial inspection and machine vision
companies gives the following basic set of pixel processing operations:

(i)    Large 2D Convolutions
       e.g. image and edge enhancement

(ii)   Interpolation and Zooming
       e.g. image resizing

(iii)  Image Compression and Decompression
       e.g. JPEG or lossless techniques for storage
            of reference images

(iv)   Contrast Stretching
       e.g. for improved viewing and highlighting detail

(v)    Image Transforms
       e.g Fast Fourier Transformations

(vi)   Real-Time Processing
       i.e. the processing of every frame with minimal latency

The wide range of options with many of these functions, and their
complexity, make implementation on dedicated hardware very difficult,
leaving a programmable solution the only sensible option - often this is
only the host processor, leaving the user to wait a very long time for
operations to complete.

All of the above functions can be executed efficiently on a Digital Signal
Processor, and even more so on the MVP due to its pixel processing
features. More importantly they can be executed at a much accelerated rate
compared to a typical PC, Macintosh, PowerPC or other state of the art
RISC processor.

For example, if one examines the mathematics involved in a convolution it
can be shown to be a series of multiply-accumulate operations, the number
of operations being dependent on the kernel size. Each ADSP of the MVP can
perform two of these operations per cycle with 8 bit pixels, and the
Transfer Controller can perform all the transfers to the external data in
parallel with these.

Therefore, in applications where convolution kernels are utilized, the
number of processing cycles required on the MVP will be far less, and
hence the algorithm will run far more quickly, than with a traditional
microprocessor architecture. This becomes even more true as the kernel
size increases.

In many of the other algorithms, for example interpolation and image
transforms, there is also a large component of simple math and matrix
operations, which the MVP can perform very quickly and efficiently.
Finally, image compression such as JPEG is based on transforms that DSPs
and the MVP are very efficient at executing, due to their similarity to
algorithms from signal processing.

Conclusion

The MVP with its two billion (2x10**9) operations per second represents a
major technological leap for the Machine Vision- / Industrial Inspection
Industries. This new standard of processing power, enabling many times
more operations per second to be executed than with the general purpose
host processor, will ensure that manipulation work on large scans and
images is performed in a fraction of the current time. This then gives
major and quantifiable benefits to the system user.
---------------------------------------------------------------------
MVP - The device that will revolutionize the Pre-Press Industry

Much is being said about the new Texas Instruments MVP (TMS320C80) device
within the Graphics and Pre-Press Industries - the aim of this article is
to clarify some of the device's features and the impact they will have on
an industry that has traditionally used Macintosh machines and other
proprietary technology.

The MVP is a fully programmable multi-processor architecture device
designed specifically for mathematically intensive applications including
the graphics and prepress markets. The device combines Advanced Digital
Signal Processors, a RISC Processor and many features of Graphics
Processors into a single chip with outstanding performance.

Digital Signal Processing

Digital Signal Processing (DSP) devices have been around for a number of
years now. They are designed to execute the algorithms found in signal
processing very quickly and efficiently, and typically have many
optimizations for this. For example:

** a multiply unit which can operate in parallel with arithmetic functions
to give a multiply/accumulate operation running in a single processor
cycle. This is the foundation of many algorithms such as filters and
convolutions. 

** data fetches and address generation in parallel with the processing
operations, again all in a single processor cycle. 

** high data bus bandwidth and often multiple or separate data buses. This
means that the processing unit never has to wait for the data it needs to
process.

** fast and predictable real time performance.

Due to their speed and power, general purpose DSP devices are now being
used in a huge range of applications including signal and image
processing, data acquisition and analysis and control.

What's special about the MVP?

The MVP is no ordinary DSP device. By incorporating four DSPs and a RISC
device onto one piece of silicon it offers previously unthinkable
performance from a single chip - two billion operations per second.

The 32 bit floating-point Master Processor (MP) is a general purpose RISC
processor designed to efficiently execute complex control code written in
a high level language such as C. It is also the overall system controller
of the MVP.

The four 32-bit fixed-point Advanced Digital Signal Processors (ADSPs) each
feature an extremely parallel instruction set with a single cycle
multiplier unit, a three input arithmetic logic unit (which allows masking
and arithmetic operations to be combined), two address generation and data
store/fetch units and program control and looping. For pixel processing,
both the multiplier and ALU are splitable, enabling multiple 8 bit pixels
to be processed in one operation. There are also specific features for
pixel processing such as bit expanders and masks built in to the
instruction set.

With the very high parallelism possible, a single ADSP instruction,
executed in a single processor cycle, can very easily carry out nine or
more RISC like operations.

In addition to this revolutionary performance the device has a very high
external bus bandwidth (400 Mbytes/s max) and features a very intelligent
DMA--Transfer Controller (TC) enabling external bus transfers
independently of any processing. The ADSPs can then concentrate on the
processing, with the TC performing even complex data movement operations
such as line drawing and polygon fills.

Thus algorithms can be efficiently partitioned with, typically, the MP
managing the system, handling host communications and any high level
operations, and the ADSPs and TC handling the low level, high speed, pixel
processing.

Typical Pre-Press Algorithms

An analysis of feedback from Pre-Press companies gives the following basic
set of pixel processing operations:

(i)    Color Space Conversion
       e.g. RGB to CMYK (Cyan, Magenta, Yellow and Black),
            the four printing ink colors.

(ii)   Interpolation and Zooming
       e.g. image resizing

(iii)  Affine Transforms / Other Geometrical Correction Algorithms
       e.g. arbitrary angle image rotations

(iv)   Image Compression and Decompression
       e.g. JPEG or lossless techniques

(v)    Large 2D Convolutions
       e.g. image and edge enhancement

(vi)   Contrast Stretching
       e.g. for improved viewing and highlighting detail

(vii)  Mask Operations
       e.g. transformations and retouching

The wide range of options with many of these functions, and their
complexity, make implementation on dedicated hardware very difficult,
leaving a programmable solution the only sensible option - often this is
only the host processor, leaving the user to wait a very long time for
operations to complete.

All of the above functions can be executed efficiently on a Digital Signal
Processor, and even more so on the MVP due to its pixel processing
features. More importantly they can be executed at a much accelerated rate
compared to a typical PC, Macintosh, PowerPC or other state of the art
RISC processor.

For example, if one examines the mathematics involved in a convolution it
can be shown to be a series of multiply-accumulate operations, the number
of operations being dependent on the kernel size. Each ADSP of the MVP can
perform two of these operations per cycle with 8 bit pixels, and the
Transfer Controller can perform all the transfers to the external data in
parallel with these.

Therefore, in applications where convolution kernels are utilized, the
number of processing cycles required on the MVP will be far less, and
hence the algorithm will run far more quickly, than with a traditional
microprocessor architecture. This becomes even more true as the kernel
size increases.

In many of the other algorithms, for example interpolation, transforms and
color space conversions, there is also a large component of simple math
and matrix operations, which the MVP can perform very quickly and
efficiently. Finally, image compression such as JPEG is based on
transforms that DSPs and the MVP are very efficient at executing, due to
their similarity to algorithms from signal processing.

Conclusion

The MVP with its two billion (2x10**9) operations per second represents a
major technological leap for the Pre-Press Industries. This new standard
of processing power, enabling many times more operations per second to be
executed than with the general purpose host processor, will ensure that
manipulation work on large scans and images is performed in a fraction of
the current time. This then gives major and quantifiable benefits to the
system user.
---------------------------------------------------------------------
MVP - The device that will revolutionize the Medical Imaging Industry

The new Texas Instruments MVP (TMS320C80) device is attracting much
attention within the Medical Imaging industry - the aim of this article is
to clarify some of the device's features and the impact they will have on
an industry that has traditionally used proprietary signal processing and
communication bus technology.

The MVP is a fully Programmable multi-processor architecture device
designed specifically for mathematically intensive applications and is
particularly well suited for high performance image processing. The device
combines Advanced Digital Signal Processors, a RISC Processor and many
features of Graphics Processors into a single chip with outstanding
performance.

Systems used in the field of radiology make use of medical imaging
techniques that are well suited to DSPs and especially the MVP.
Mammography, computed tomography, magnetic resonance imaging, ultrasound,
and nuclear medicine, and teleradiology applications have very high
processing requirements and use algorithms that can be implemented on
Digital Signal Processors. TMS320C80 products that use industry standard
buses are enabling improvements in image quality and reducing processing
time, which ultimately improves patient care and clinic efficiency.

Digital Signal Processing

Digital Signal Processing (DSP) devices have been around for a number of
years now. They are designed to execute the algorithms found in signal
processing very quickly and efficiently, and typically have many
optimizations for this. For example:

** A multiply unit which can operate in parallel with arithmetic functions
to give a multiply/accumulate operation running in a single processor
cycle. This is the foundation of many algorithms such as filters and
convolutions.

** Data fetches and address generation in parallel with the processing
operations, again all in a single processor cycle.

** High data bus bandwidth and often multiple or separate data buses. This
means that the processing unit never has to wait for the data it needs to
process.

** Fast and predictable real time performance.

Due to their speed and power, general purpose DSP devices are now being
used in a wide range of applications including signal and image
processing, data acquisition and analysis and control.

What's special about the MVP?

The MVP is no ordinary DSP device. By incorporating four DSPs and a RISC
device on to one piece of silicon it offers previously unthinkable
performance from a single chip two billion operations per second.

The 32 bit floating-point Master Processor (MP) is a general purpose RISC
processor designed to efficiently execute complex control code written in
a high level language such as C. It is also the overall system controller
of the MVP.

The four 32 bit fixed-point Advanced Digital Signal Processors (ADSPs) each
feature an extremely parallel instruction set with a single cycle
multiplier unit, a three input arithmetic logic unit (which allows masking
and arithmetic operations to be combined), two address generation and data
store/fetch units and program control and looping. For pixel processing,
both the multiplier and ALU are splitable, enabling multiple 8 bit pixels
to be processed in one operation. There are also specific features for
pixel processing such as bit expanders and masks built in to the
instruction set.

With the very high parallelism possible, a single ADSP instruction,
executed in a single processor cycle, can very easily carry out nine or
more RISC like operations.

In addition to this revolutionary performance the device has a very high
external bus bandwidth (400 Mbytes/s max) and features a very intelligent
DMA Transfer Controller (TC) enabling external bus transfers independently
of any processing. The ADSPs can then concentrate on the processing, with
the TC performing even complex data movement operations such as line
drawing and polygon fills.

Thus algorithms can be efficiently partitioned with, typically, the MP
managing the system, handling host communications and any high level
operations, and the ADSPs and TC handling the low level, high speed, pixel
processing.

Typical Medical Imaging Algorithms

An analysis of feedback from Medical Imaging companies gives the following
basic set of pixel processing operations:

(i)    Edge Enhancement
       e.g. filtering and edge detection

(ii)   Real-Time Zooming
       e.g. image resizing

(iii)  Averaging of Motion
       e.g. subtraction of two moving images

(iv)   Image Compression and Decompression
       e.g. JPEG or lossless techniques for image
            storage and retrieval

(v)    Video Conferencing
       e.g. H.320 for teleradiology

(vi)   Contrast Stretching
       e.g. for improved viewing and highlighting detail

The wide range of options with many of these functions, and their
complexity, make implementation on dedicated hardware very difficult,
leaving a programmable solution the only sensible option - often this is
only the host processor, leaving the user to wait a very long time for
operations to complete.

All of the above functions can be executed efficiently on a Digital Signal
Processor, and even more so on the MVP due to its pixel processing
features. More importantly they can be executed at a much accelerated rate
compared to a typical PC, Macintosh, PowerPC or other state of the art
RISC processor.

For example, if one examines the mathematics involved in a filtering
application it can be shown to be a series of multiply-accumulate
operations, the number of operations being dependent on the kernel size.
Each ADSP of the MVP can perform two of these operations per cycle with 8
bit pixels, and the Transfer Controller can perform all the transfers to
the external data in parallel with these.

Therefore, in applications where kernels are utilized, the number of
processing cycles required on the MVP will be far less, and hence the
algorithm will run far more quickly, than with a traditional
microprocessor architecture. This becomes even more true as the kernel
size increases.

In many of the other algorithms, for example averaging and transforms like
zooming and stretching, there is also a large component of simple math and
matrix operations, which the MVP can perform very quickly and efficiently.
Finally, image compression such as JPEG is based on transforms that DSPs
and the MVP are very efficient at executing, due to their similarity to
algorithms from signal processing.

Conclusion

The MVP with its two billion (2x10**9) operations per second represents a
major technological leap for the Medical Imaging industry. This new
standard of processing power, enabling many times more operations per
second to be executed than with the general purpose host processor, will
ensure that processing of high resolution images is performed in a
fraction of the current time. This will ultimately improve patient care
and clinic efficiency.
---------------------------------------------------------------------
Spectrum Signal Processing Inc
8525 Baxter Place
100 Production Court
Burnaby, BC V5A 4V7 CANADA
604-421-5422,  fax 604-421-1764

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