sourcefile.xyz

produces a default name of:

sourcefile.lst

If the source code is from standard input and the -l flag is used without specifying an assembler-listing file name, the listing file name is a.lst.

The mnemonics cross-reference is restricted to instructions that have different mnemonics in POWER and PowerPC, but that have the same op code, function, and input operand format.

Because the -s flag is used to change the assembler-listing format, it implies the -l flag. If both option flags are used and different assembler-listing file names (specified by the ListFile variable) are given, the listing file name specified by the ListFile variable used with the -l flag is used. If an assembler-listing file name is not specified with either the -l or -s flag, a default assembler listing file name is produced by replacing the suffix extension of the source file name with a .lst extension.

Note: When neither -W nor -w is specified, the instructional warnings are reported, but other warnings are suppressed.

sourcefile.xyz

produces a default name of:

sourcefile.xref

Note: The assembler does not generate an object file when the -x flag is used.

If this flag is not used and no .machine pseudo-op is present in the source program, the default assembly mode is used. The default assembly mode has the POWER/PowerPC intersection as the target environment, but treats all POWER/PowerPC incompatibility errors (including instructions outside the POWER/PowerPC intersection and invalid form errors) as instructional warnings.

If an assembly mode that is not valid is specified and no .machine pseudo-op is present in the source program, an error is reported and the default assembly mode is used for instruction validation in pass 1 of the assembler.

If the -m flag is used, the ModeName variable can specify one of the following values:

""

Explicitly specifies the default assembly mode which has the POWER/PowerPC intersection as the target environment, but treats instructions outside the POWER/PowerPC intersection and invalid form errors as instructional warnings. A space is required between -m and the null string argument (two double quotation marks).

com

Specifies the POWER/PowerPC intersection mode. A source program can contain only instructions that are common to both POWER and PowerPC; any other instruction causes an error. Any instruction with an invalid form causes errors, terminates the assembly process, and results in no object code being generated.

Note: Certain POWER instructions are supported by the PowerPC 601 RISC Microprocessor, but do not conform to the PowerPC architecture. These instructions cause errors when using the com assembly mode.

Notes:

1. The PowerPC optional instructions are implemented in each PowerPC processor and do not belong to the ppc mode. These instructions generate an error if they appear in a source program which is assembled using the ppc assembly mode.
2. Certain instructions conform to the PowerPC architecture, but are not supported by the PowerPC 601 RISC Microprocessor.

Note: All POWER/PowerPC incompatibility errors are ignored when using the any assembly mode, and no warnings are generated.

Note: The POWER implementation instruction set is a subset of the POWER2 implementation instruction set.

Note: The PowerPC 601 RISC Microprocessor design was completed before the PowerPC architecture. Therefore, some PowerPC instructions may not be supported by the PowerPC 601 RISC Microprocessor.

Attention: It is recommended that the 601 assembly mode not be used for applications that are intended to be portable to future PowerPC systems. The com or ppc assembly mode should be used for such applications.

The PowerPC 601 RISC Microprocessor implements the PowerPC architecture plus some POWER instructions which are not included in the PowerPC architecture. This allows existing POWER applications to run with acceptable performance on PowerPC systems. Future PowerPC systems will not have this feature. The 601 assembly mode may result in applications that will not run on existing POWER systems and that may not have acceptable performance on future PowerPC systems, because the 601 assembly mode permits the use of all the instructions provided by the PowerPC 601 RISC Microprocessor.